Digital VLSI Chip Design with Cadence and Synopsys CAD Tools


€40,99
Auteur Neil Weste
Taal ENG- Engels
Bindwijze Paperback
ISBN/EAN 9780321547996
Genre Onderwijs
Doelgroep Tieners en jongvolwassenen, Volwassenen en jong volwassenen, Volwassenen
BookTok categorie Studieboek / academisch
Title: Default Title
Price:
Sale price€40,99 Regular price€54,90

Digital VLSI Chip Design with Cadence and Synopsys CAD Tools Neil Weste is a study book that covers the complete design process of a functional CMOS integrated circuit. This reference work supports students in designing digital VLSI chips using leading commercial CAD software. With detailed tutorials, step-by-step instructions, and clear screenshots, it provides practical guidance for chip design with Cadence and Synopsys tools.

Description

This study book offers a systematic and practice-oriented approach to digital VLSI chip design. It guides users through designing, simulating, and preparing a VLSI chip design for fabrication. The combination of theoretical explanations and concrete software examples makes it suitable for use alongside a main text on digital VLSI, and helps users understand both the concepts and their application in commercial design environments.

Product specifications

  • Author: Neil Weste
  • Publisher: Pearson Education (US)
  • Imprint: Pearson
  • Publication date: 2009-07-23
  • Number of pages: 600
  • ISBN: 9780321547996
  • Theme: Electronic devices and materials
  • BISAC: TECHNOLOGY & ENGINEERING / Materials Science / Electronic Materials

About the author

Professor Erik Brunvand is affiliated with the School of Computing at the University of Utah. His research focuses on computer architecture and VLSI systems, with particular attention to asynchronous and self-timed systems. He develops methods to automatically translate concurrent communication programs into asynchronous VLSI circuits, and builds prototypes of asynchronous computer systems based on FPGA and custom VLSI chips.

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